A prototyped 40nm-generation chip embedded with flash memory
A prototyped 40nm-generation chip embedded with flash memory
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Renesas Electronics Corp announced Dec 14, 2011, that it has developed a technology for mounting flash memory manufactured by using 40nm process technology on a microcomputer.

The company plans to ship samples of an automotive microcomputer integrated with flash memory, which will be the first product manufactured by using the new technology, in the early fall of 2012.

The latest microcomputers that are integrated with flash memory and currently being mass-produced are manufactured by using 90nm process technology. Renesas' rivals have already announced the development of products manufactured using 65nm and 55nm process technologies, but Renesas said, "We were the first to announce the development of 40nm-generation technology."

The company aims to keep technical advantages in this field by advancing from 90nm generation to 40nm generation at one effort.

For the flash memory to be mounted on a microcomputer, Renesas used MONOS (metal oxide nitride oxide silicon) cells having a split-gate structure. The company has used this technology from 150nm generation.

In MONOS cells having a split-gate structure, a control gate and memory gate are placed next to each other. While it increases the cell area, there are many advantages, too. For example, because the transistor for the logic chip can be used on the side of the control gate, it becomes possible to prevent punchthrough between sources and drains at the time of scaling down process.

For low-speed flash memory to be mounted on a microcomputer, Renesas uses floating-gate cells with a split-gate structure.

This time, Renesas prototyped and evaluated flash memory cell arrays with a code storage capacity of 2.5 Mbytes and a data storage capacity of 128 Kbytes by using 40nm process technology.

The reading speed of the array for storing codes is 120MHz, which is 20% higher than that of the company's existing product manufactured by using 90nm process technology. The speed was enhanced because the parasitic capacities of the word and bit lines were reduced by scaling down the process. The flash memory cell array can be rewritten by 1,000 times, which is the same as before.

On the other hand, the reading speed of the array for storing data is 10MHz, which is the same as before. And it can be rewritten by 125,000 time, which is 25% more than before. Renesas guarantees a data retention period of 20 years for both of the two flash memory cell arrays.

The temperature range in which packaged products using the flash memory cell arrays can be read is from -40 to 125°C (ambient temperature) and -40 to 150°C (junction temperature). However, in the case of a bare chip, it is possible to deal with a junction temperature of up to 170°C, Renesas said.