The maximum write speed was enhanced by 1.6 times.
The maximum write speed was enhanced by 1.6 times.
[Click to enlarge image]
The structure of the power supply system for 3D SSDs
The structure of the power supply system for 3D SSDs
[Click to enlarge image]
The block diagram of the newly-developed power supply
The block diagram of the newly-developed power supply
[Click to enlarge image]
The block diagram of the circuit that detects the number of channels
The block diagram of the circuit that detects the number of channels
[Click to enlarge image]
The circuit that detects an increase in the number of channels
The circuit that detects an increase in the number of channels
[Click to enlarge image]
A simulation of detecting an increase in the number of channels
A simulation of detecting an increase in the number of channels
[Click to enlarge image]

A university research group and Toshiba Corp jointly developed a power supply technology that can enhance the write speed of SSDs (solid state drives) by 60% to 4.2Gbps compared with existing SSDs.

The research group is led by Ken Takeuchi, associate professor at the Department of Electrical Engineering and Information Systems, Graduate School of Engineering of the University of Tokyo.

The new technology dynamically and optimally controls power supply in accordance with the number of NAND flash memories operating in parallel. It is target at the "3D SSD," which three-dimensionally stacks the components of, for example, a NAND flash memory.

The research group and Toshiba announced the details of the technology at 2010 Symposium on VLSI Circuits, which took place from June 16 to 18, 2010, in Honolulu, Hawaii (thesis number: 22.4).

Pointing out the problem of SSDs, Takeuchi said, "While the speeds of interfaces are rapidly increasing, the speeds of NAND flash memories are lagging behind." In other words, unless the speeds of NAND flash memories are drastically improved, it is not possible to realize a high speed SSD whose power consumption is low enough to be practical.

This time, the research group and Toshiba aimed to solve this problem by using a power supply system equipped with a boost converter that was developed by Takeuchi, etc in February 2009 (See related article). The power supply system consists of a coil, high-voltage switch and boost converter control circuit. Among them, the boost converter control circuit was greatly improved.

In an SSD, multiple NAND flash memories are operating in parallel. And the number of chips operating in parallel (the number of channels) changes according to the state of data writing, etc. The former power supply system developed by Takeuchi, etc supplies a certain amount of electricity, regardless of the number of channels.

With this method, when the number of channels exceeds a certain level, it becomes impossible to supply electricity needed for writing data (about 20V) to each chip. Therefore, it limits the number of channels to 15 or less, capping the write speed of SSDs at 2.6Gbps.

(Continue to the next page)