Toshiba Corp developed an STT-MRAM (spin transfer torque magnetic random access memory) base technology for the cache memories of microprocessors used in smartphones, tablet computers, etc.
The technology enables to reduce the power consumptions of the microprocessors in operation to about 1/30 that with currently-used STT-MRAM technologies. With the new technology, it becomes possible to make the most of so-called normally-off operation, which uses non-volatile cache memory and turns off power supply when a device is not in operation.
Currently, the power consumptions of processors in smartphones and tablet computers are increasing partly because the capacities of their cache memories are increasing by about 100% every year. And cache memory accounts for 20-40% of a processor's area, 70% of the transistors and about 50% of the power consumption.
Thus far, SRAM, which is a volatile memory, has been used as cache memory. But ideas of replacing it with a non-volatile memory such as STT-MRAM have been proposed at various events.
However, when a traditional STT-MRAM is used for cache memory or other applications that frequently access memory, it increases power consumption because its operation speed is slow and it consumes a large amount of power when in operation, Toshiba said.
According to the company's estimate, when a traditional STT-MRAM is in operation, its energy (power consumption x operation time) is at least about 1,500pJ, which is 10 times higher than the energy of an SRAM in operation (about 150pJ) including leakage current. So, it does not contribute to lowering power consumption.
To lower power consumption, it is necessary to increase the operation speed of STT-MRAM and lower the power consumed by the memory in operation. Therefore, Toshiba made improvements to the perpendicular magnetic memory element that it developed in 2007 for the first time in the industry. As a result, the power consumption of the memory element in operation was reduced by 90%.
(Continue to the next page)