Renesas Electronics Corp will apply TSV (through silicon via) technology to its mobile SoCs so that they will support Wide I/O DRAM, which was standardized by JEDEC.

Currently, the company is evaluating the technology by using TEG (test element group), aiming to start volume production of mobile SoCs by using the technology in 2013. The overview of the technology was disclosed at the 13th IC Packaging Technology Expo, which runs from Jan 18 to 20, 2012, in Tokyo.

Wide I/O DRAM is a standard that JEDEC established in December 2011 for mobile DRAMs. It enables to enhance the speed of DRAM and reduce its power consumption by expanding data input/output width to 512 bits. Because the DRAM is stacked on the back of an SoC via 1,200-contact microbump, TSV is necessary on the SoC side.

Renesas, which develops mobile SoCs, plans to introduce TSV to its application processors for mobile phones first. When TSV is introduced, the circuit layout of SoC has to be changed. Therefore, the company is now using TEG to test an IP whose layout was changed in accordance with the introduction of TSV.

Also, Renesas is developing a test method for SoCs equipped with Wide I/O DRAM. The company plans to contract out the production of advanced SoCs to a silicon foundry as well as the production of TSV.