A Japanese research group developed a technology to make a NAND flash memory whose drive voltage is as low as 1V and power consumption is 86% lower than existing NAND flash memories.
The group consists of Ken Takeuchi, associate professor at the Department of Electrical Engineering and Information Systems, Graduate School of Engineering of the University of Tokyo, and researchers of Japan's Advanced Industrial Science and Technology (AIST).
When an SSD (solid state drive) is made by using the new memory, it is possible to enhance the data writing speed to up to about 10 Gbytes per second because data can be written on 100 or more chips in parallel.
This time, the research group lowered the drive voltage of a NAND flash memory (ferroelectric NAND) that uses a ferroelectric substance and has been developed by it from 3V to 1V. A ferroelectric NAND is a device made by applying a ferroelectric gate insulating film and a metal gate to the cell of NAND flash memory. While the writing voltage of a normal NAND flash memory with a floating gate structure is as high as about 20V, that of a ferroelectric NAND is about 6V.
As a result, the power consumption of a ferroelectric NAND can be reduced by lowering the drive voltage of the core circuit more than that of existing NAND flash memories. Even when the drive voltage is lowered to about 1V, there is no need to drastically increase the number of the steps of the charge pump circuit (boost circuit); therefore, the increase in the power consumption of the charge pump circuit is small.
When the drive voltage of an existing NAND flash memory is lowered to about 1V, the number of the steps of the charge pump circuit drastically increases; as a result, the increase in the power consumption cancels out the lowered power consumption of the core circuit.
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