Nikkei Electronics has measured chip areas of microprocessors and graphics LSIs mounted on the main boards of the "PlayStation 3" (PS3) and "Wii." As we removed heat spreaders stuck on the upper surface of respective product packages, we found their dice embedded with the interposers using flip-chip packaging.
With a micrometer caliper, the PS3's "Cell" microprocessor and "RSX" graphics LSI measured 19.0 x 12.0 mm (228 mm2) and 16.2 x 15.9 mm (258 mm2), respectively. The "Emotion Engine" and "Graphics Synthesizer" chips featured with the "PlayStation 2" (PS2) at its first release took 226 mm2 and 279 mm2, respectively. In other words, despite different design rules, core LSI chips in the PS3 and PS2 turned out to take almost the same chip areas.
The chip, which works as a south bridge in the PS3, measured 13 x 13 mm. The "EE + GS" chip loaded to boost the PS3's compatibility with the PS2 is connected with this south bridge via another bridge LSI. In short, the "IOP" input/output processor LSI used in the PS2 has been replaced with these bridge LSI, south bridge and Cell chips. The EE + GS chip embedded with the PS3 measured about 12.5 x 7 mm.
After watching the Cell and RSX, the Wii's "Broadway" microprocessor chip looked surprisingly small. It measured only 4.2 x 4.5 mm (18.9 mm2). This is smaller than half the size of the "Gekko" microprocessor (43 mm2) incorporated in the "GameCube" at its first release.
Removing the heat spreader, we found the Hollywood was a multi-chip module packaging two chips. Of these two chips, a chip measuring 9 x 8 mm, which locates nearer to the external GDDR3 synchronous DRAM, seemed to be the SoC (development code name: Vegas) that integrates a graphics drawing circuit, a DRAM controller and a diversity of I/O circuits, and the other chip measuring 13.5 x 7 mm appeared to be the high-speed DRAM (development code name: Napa) based on MoSys (Monolithic System Technology), Inc.'s "1T-SRAM" technology. The "Flipper" SoC mounted on the first GameCube occupied 110 mm2.