Sony Computer Entertainment Inc. (SCE) revealed the details of its next-generation PlayStation 3 (PS3) game console at a press conference held in Los Angeles. The meeting started at 3:00 PM to time with the opening of the Electronic Entertainment Expo (E3). SCE plans to start marketing the PS3 in the spring of 2006.
The PS3 features a Cell microprocessor operating at 3.2 GHz. The prototype chip, disclosed at the International Solid-State Circuit Conference in February 2005, was originally announced to operate "at a frequency of 4 GHz or more." The chip installed in the commercial product, however, was designed to have a lower frequency in view of yield and heat dissipation. Seven Synergistic Processing Elements, the signal processors, are mounted on the Cell. Eight of them are actually mounted on the chip, but one of them is redundant. "We have decided to use seven in view of yields," said a SCE spokesperson. The graphics LSI installed in the game console, manufactured by NVIDIA Corporation, has an operating frequency of 550 MHz and supports 2-channel output at 1080p. An XDR DRAM of 265 MB is used as the main memory and a GDDR3 RAM of 256 MB for video RAM is also mounted.
For communication functionality, the PS3 is equipped with a 3-port Ethernet terminal, IEEE 802.11b/g wireless LAN and Bluetooth 2.0 as standard, and can connect to up to seven Bluetooth-based wireless controller units. In addition, the user can use wireless LAN to connect SCE's portable game console PSP to the PS3 as a controller unit, and connect to the PS3 from outside through an IP network.
Naoki Asakawa and Hiroki Yomogita, Nikkei Electronics